Electrical Rule Check Report

Date:		16.08.2023
Time:		9:35:49
Filename:		C:\Users\fg77rg\Userdata\_backup\Altium\projects\_RainLight\R124_EVK_V31\Project Outputs\R124_EVK_V31 - Electrical Rules Check.html

Class	Document	Message
Warning	R124_EVK_V31_Top.SchDoc	Net CSB has no driving source (Pin R9-2, Pin TP_CSB-1, Pin U1-9)
Warning	R124_EVK_V31_Top.SchDoc	Net EN has no driving source (Pin J11-2, Pin J12-1, Pin J_SPI_IO1-8, Pin TP_EN-1, Pin U1-8)
Warning	R124_EVK_V31_Top.SchDoc	Net MOSI has no driving source (Pin R6-2, Pin TP_MOSI-1, Pin U1-10)
Warning	R124_EVK_V31_Top.SchDoc	Net SCK has no driving source (Pin R7-2, Pin TP_SCK-1, Pin U1-11)
Warning	R124_EVK_V31_Top.SchDoc	Nets Wire CSB has multiple names (Net Label CSB (3), Sheet Entry U_Device-SPI.CSB(Passive), Sheet Entry U_MCU-SPI.CSB(Passive))
Warning	R124_EVK_V31_Top.SchDoc	Nets Wire MISO has multiple names (Net Label MISO (3), Sheet Entry U_Device-SPI.MISO(Passive), Sheet Entry U_MCU-SPI.MISO(Passive))
Warning	R124_EVK_V31_Top.SchDoc	Nets Wire MOSI has multiple names (Net Label MOSI (3), Sheet Entry U_Device-SPI.MOSI(Passive), Sheet Entry U_MCU-SPI.MOSI(Passive))
Warning	R124_EVK_V31_Top.SchDoc	Nets Wire SCK has multiple names (Net Label SCK (3), Sheet Entry U_Device-SPI.SCK(Passive), Sheet Entry U_MCU-SPI.SCK(Passive))